lC1a is provided with re- sistive and capacitive feedback to form an integrator with initial conditions. lC1b is in an "open loop" mode so that its output is either high or low depending on its inputs, and changes state when the output of lC1a goes more negative than the voltage set at ZD2.
When . the output of IC1 b goes positive the transistor Q1 biases hard on switching the SCR on. Diodes D1 -D4 are to make the SCR conduct on both halves of the mains wave form. The delay period is set by the components ZD1, ZD2;·C, RVl, and R. lf ZD1 is chosen to be OV5 and ZD2 at 5V, then the maximum delay period is given by T= 10CR
RV1 = ZD2/ZD1 * R<10.r
The meter is a voltrneter with as fsd equal to the value of ZD2. The switch then operates when the meter reaches fsd. The meter can therefore be calibrated to show remaining delay with OV equal to T and fsd equal to zero. SW2 changes round the inputs of the op—amp so that the output either swings from high to low, or, low to high. SW3 is to reset the time delay which it does by discharging the capacitor. ZD3 should be chosen to be a value slightly higher than ZD2, this is to stop the capacitor charging beyond a set limit and therefore overloading the meter. SW1 is the run—hold switch. When the switch is at +12 volts the integrator charges the capacitor. When the switch is set to OV the charging of the capacitor is stopped until the switch is set back to 12 volts. . Q1 is a buffer to avoid loading on the IC and to trigger the SCR. The supply voltage should be 12-0-12 and does not need to be well smoothed as the zener diodes set the timing function,
Simple Time Delay Circuit Using Op Amp
When . the output of IC1 b goes positive the transistor Q1 biases hard on switching the SCR on. Diodes D1 -D4 are to make the SCR conduct on both halves of the mains wave form. The delay period is set by the components ZD1, ZD2;·C, RVl, and R. lf ZD1 is chosen to be OV5 and ZD2 at 5V, then the maximum delay period is given by T= 10CR
RV1 = ZD2/ZD1 * R<10.r
The meter is a voltrneter with as fsd equal to the value of ZD2. The switch then operates when the meter reaches fsd. The meter can therefore be calibrated to show remaining delay with OV equal to T and fsd equal to zero. SW2 changes round the inputs of the op—amp so that the output either swings from high to low, or, low to high. SW3 is to reset the time delay which it does by discharging the capacitor. ZD3 should be chosen to be a value slightly higher than ZD2, this is to stop the capacitor charging beyond a set limit and therefore overloading the meter. SW1 is the run—hold switch. When the switch is at +12 volts the integrator charges the capacitor. When the switch is set to OV the charging of the capacitor is stopped until the switch is set back to 12 volts. . Q1 is a buffer to avoid loading on the IC and to trigger the SCR. The supply voltage should be 12-0-12 and does not need to be well smoothed as the zener diodes set the timing function,
Simple Time Delay Circuit Using Op Amp
0 comments:
Post a Comment
Note: Only a member of this blog may post a comment.